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Dr. Yanzhi Wang

Assistant Professor, 2015-present

Department of Electrical & Computer Engineering, College of Engineering,

Khoury College of Computer Science (Affiliated),

Northeastern University

B.S. (Tsinghua), Ph.D. (University of Southern California)

329 Dana, 360 Huntington Avenue
Boston, MA 02115
Phone: 617.373.8805
Email: yanz.wang@northeastern.edu


About:

Yanzhi Wang is currently an assistant professor in the Department of Electrical and Computer Engineering, and Khoury College of Computer Science (Affiliated) at Northeastern University. He has received his Ph.D. Degree in Computer Engineering from University of Southern California (USC) in 2014, under the supervision of Prof. Massoud Pedram. He received the Ming Hsieh Scholar Award (the highest honor in the EE Dept. of USC) for his Ph.D. study. He received his B.S. Degree in Electronic Engineering from Tsinghua University in 2009 with distinction from both the university and Beijing city.

Dr. Wang’s current research interests are the following. His group works on both algorithms and actual implementations (mobile and embeded systems, FPGAs, circuit tapeouts, GPUs, emerging devices, and UAVs).

  • Real-time and energy-efficient deep learning and artificial intelligence systems
  • Model compression of deep neural networks (DNNs)
  • Neuromorphic computing and non-von Neumann computing paradigms
  • Cyber-security in deep learning systems

For a brief list of technical achievements, his research (i) achieves and maintains the highest model compression rates on representative DNNs since 09/2018 (ECCV18, ASPLOS19, ICCV19, ISLPED19, ASP-DAC20, AAAI20-1, AAAI20-2, etc.), (ii) achieves, for the first time, real-time and fastest execution of representative large-scale DNNs on a mobile device (ASPLOS20, AAAI20, ICML19), (iii) achieves the highest performance/energy efficiency in DNN implementations on many platforms (FPGA19, ISLPED19 , AAAI19, HPCA19, ISSCC19, ASP-DAC20 , DATE20, AAAI20). It is worth mentioning that his work on AQFP superconducting based DNN inference acceleration, which is validated through cryogenic testing, has by far the highest energy efficiency among all hardware devices (ISCA19, ICCAD18).

His research works have been published broadly in top conference and journal venues, ranging from (i) EDA, solid-state circuit and system conferences such as DAC, ICCAD, DATE, ISLPED, FPGA, LCTES, ISSCC, etc., (ii) architecture and computer system conferences such as ASPLOS, ISCA, MICRO, HPCA, CCS, VLDB, INFOCOM, ICDCS, etc., (iii) machine learning algorithm conferences such as AAAI, CVPR, ICML, ICCV, ICLR, IJCAI, ECCV, ACM MM, ICDM, etc., and (iv) IEEE and ACM transactions with impact factor up to 11.7. He ranks No. 2 in CSRankings at Northeastern University in the past 5 years, and around No. 35 throughout the U.S. His research works have been cited for over 5,600 times according to Google Scholar. He has received four Best Paper Awards, has another eight Best Paper Nominations and three Popular Papers in IEEE TCAD. Sample other research awards include Massachusetts Acorn Innovation Award, Google Equipment Research Award, MIT Tech Review TR35 China Finalist, Ming Hsieh Scholar Award, Young Student Support Award of DAC (for himself and six of his Ph.D. students), etc.

Yanzhi has delivered over 90 invited technical presentations on research of real-time and efficient deep learning systems. His research works have been broadly featured and cited in over 200 media, including Boston Globe, Communications of ACM, VentureBeat, The Register, NEU News, Import AI, Italian National TV, Quartz, ODSC, MIT Tech Review, TechTalks, IBM Research Blog, ScienceDaily, AAAS, CNET, ZDNet, New Atlas, Tencent News, Sina News, to name a few.

The first Ph.D. student of Yanzhi, Dr. Caiwen Ding, has graduated in June 2019, and has become a tenure-track assistant professor in Dept. of CSE at University of Connecticut. The second Ph.D. student, Ning Liu, will start as a superstar employee at DiDi AI Research (DiDi Inc.).

Ph.D., Postdoc, and Visiting Scholar/Students Positions Available: Northeastern University has been rising thanks to the strong leadership and efforts from faculty members. The university is located in between the famous Museum of Fine Arts (MFA) and Boston Symphony and Berkelee College of Music, the Best Location at Boston! Please apply to NEU.


Two Representative Contributions:

Yanzhi’s group has made the following two key contributions on DNN model compression and acceleration. The first is a systematic, unified DNN model compression framework (ECCV18, ASPLOS19, ICCV19, AAAI20-1, AAAI20-2, HPCA19, etc.) based on the powerful mathematical optimization tool ADMM (Alternating Direction Methods of Multipliers), which applies to non-structured and various types of structured weight pruning as well as weight quantization technique of DNNs. It achieves unprecedented model compression rates on representative DNNs, consistently outperforming competing methods. When weight pruning and quantization are combined, we achieve up to 6,645X weight storage reduction without accuracy loss, which is two orders of magnitude higher than prior methods. Our most recent results (on Arxiv) suggest that non-structured weight pruning is not desirable at any hardware platform.

Recently, the second major contribution has been made (ASPLOS20, AAAI20, ICML19, etc.) based on the ADMM solution framework. The compiler has been identified as the bridge between DNN algorithm-level compression and hardware-level acceleration, maintaining highest possible parallelism degree without accuracy compromise. Using mobile device (embedded CPU/GPU) as an example, we have developed a combination of pattern and connectivity pruning techniques, possessing both flexibility (and high accuracy) and regularity (and then hardware parallelism and acceleration). Accuracy and hardware performance are not a tradeoff anymore. Rather, it is possible for DNN model compression to be desirable at all of theory, algorithm, compiler, and hardware levels. For mobile devices, we achieve undoubtfully the fastest in DNN acceleration (e.g., 18.9ms inference time for VGG-16, 26ms for ResNet-50, and 5.4ms for MobileNet-V2 on a smartphone without accuracy loss), even outperforming prior work on FPGA and ASIC in many cases. All DNNs can be potentially be real-time in mobile devices through our algorithm-compiler-hardware co-design.


Recent News:  

  • 12/2019 Invited lecture on “From 7,000X model compression to 100X acceleration: Achieving real-time execution of ALL DNNs on mobile devices” at Course Embedded Machine Learning at Dept. of ECE at Rice University.
  • 12/2019 Invited lecture on “From 7,000X model compression to 100X acceleration: Achieving real-time execution of ALL DNNs on mobile devices” at Course Introduction to Computer Engineering at Northeastern University.
  • 12/2019 Yanzhi will become PC member at IJCAI 2020.
  • 11/2019 Our work on adversarial T-shirt to evade neural network detection featured in VentureBeat, The Register, NEU News, Boston Globe, Import AI, Quartz, ODSC, VICE , and has been cited/quoted by over 80 media.
  • 11/2019 Our work on protecting neural networks with hierarchical random switching (IJCAI 2019) featured in TechTalks, Medium , IBM Research Blog, and has been cited by other 20 media.
  • More news

Research Sponsors: